Example Embodiment relate to a processor, and more particularly, to a data cache controller which may reduce cache latency, devices having the same and and/or a method of operating the same.
A cache is a component storing data so that a read request or a write request for the data may be served faster. The cache may be embodied in a volatile memory like a static random access memory SRAM. Because of instability of a volatile memory like SRAM, an error correction code (ECC) is used a lot in a high-availability application like a server.
In addition, since the volatile memory becomes more unstable as a process technology gets refined, the ECC is expected to be used in most general applications like an electronic device. Therefore, a cache controller for controlling most caches includes an ECC. The cache controller checks if there is an error in the data when reading data from the cache.
A delay occurs in the cache when the cache controller checks an error first and uses the data for processing. The delay increases cache latency. The cache latency means a delay when writing data between a central processing unit (CPU) and a cache or reading the data.